interrupt request - significado y definición. Qué es interrupt request
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Qué (quién) es interrupt request - definición

HARDWARE SIGNAL SENT TO A PROCESSOR TO INTERRUPT A RUNNING PROGRAM AND HANDLE INPUT
INTR; Interrupt Request; IRQ conflict; Interrupt Request Level; Irq; Interrupt request

interrupt request         
(IRQ) The name of an input found on many processors which causes the processor to suspend normal instruction execution temporarily and to start executing an interrupt handler routine. Such an input may be either "level sensitive" - the interrupt condition will persist as long as the input is active or "edge triggered" - an interrupt is signalled by a low-to-high or high-to-low transition on the input. Some processors have several interrupt request inputs allowing different priority interrupts. (1994-12-08)
Interrupt request (PC architecture)         
In a computer, an interrupt request (or IRQ) is a hardware signal sent to the processor that temporarily stops a running program and allows a special program, an interrupt handler, to run instead. Hardware interrupts are used to handle events such as receiving data from a modem or network card, key presses, or mouse movements.
IRQ         
¦ abbreviation Iraq (international vehicle registration).

Wikipedia

Interrupt request (PC architecture)

In a computer, an interrupt request (or IRQ) is a hardware signal sent to the processor that temporarily stops a running program and allows a special program, an interrupt handler, to run instead. Hardware interrupts are used to handle events such as receiving data from a modem or network card, key presses, or mouse movements.

Interrupt lines are often identified by an index with the format of IRQ followed by a number. For example, on the Intel 8259 family of programmable interrupt controllers (PICs) there are eight interrupt inputs commonly referred to as IRQ0 through IRQ7. In x86 based computer systems that use two of these PICs, the combined set of lines are referred to as IRQ0 through IRQ15. Technically these lines are named IR0 through IR7, and the lines on the ISA bus to which they were historically attached are named IRQ0 through IRQ15 (although historically as the number of hardware devices increased, the total possible number of interrupts was increased by means of cascading requests, by making one of the IRQ numbers cascade to another set or sets of numbered IRQs, handled by one or more subsequent controllers).

Newer x86 systems integrate an Advanced Programmable Interrupt Controller (APIC) that conforms to the Intel APIC Architecture. These APICs support a programming interface for up to 255 physical hardware IRQ lines per APIC, with a typical system implementing support for only around 24 total hardware lines.

During the early years of personal computing, IRQ management was often of user concern. With the introduction of plug and play devices this has been alleviated through automatic configuration.